TID Effects in the Lateral STI Oxide of Planar CMOS Transistors

Using comprehensive experimental data and 3-D technology computer-aided design (TCAD) simulations, this article discusses the effects and mechanisms of total ionizing dose (TID) in the lateral shallow trench isolation (STI) in planar CMOS technologies in the 65–28-nm nodes. During irradiation to ultrahigh doses, nMOS transistors often exhibit a continuous increase in the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>-state (leakage) current, while the evolution of the on-current, threshold voltage, and transconductance show a rebound that is considerably more evident in narrow-channel transistors. This difference in the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>- and <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>-state parameters evolution with TID is traceable to variable de-passivation of interface traps in depth along the STI sidewall. While at all depths TID determines a build-up of trapped holes in the STI oxide, only in the shallower portion, a significant number of interface traps are gradually de-passivated leading to an accumulation of negative trapped charge. The different dynamics of hole and electron trapping determine the rebound of the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state parameters in typical high-dose-rate experiments, while the increase in off-current is driven by the constant accumulation of trapped holes at larger depths. In pMOS transistors, where interface traps also get positively charged, the degradation of all parameters is constant with TID, larger than for nMOS, and channel width-dependent. This response is consistent across different technology nodes, which highlights the fundamental role of the STI oxide in determining the TID tolerance of MOS transistors in planar technologies with very thin gate oxide (<5 nm).

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Publication Details

Journal
IEEE Transactions on Nuclear Science
Published
2024-12-13
DOI
https://doi.org/10.1109/tns.2024.3517512
Citations
4
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
0.83
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article

TID Effects in the Lateral STI Oxide of Planar CMOS Transistors

S. Mattiazzo, Simone Gerardin, G. Borghello, F. Faccio et al.
4 citations
IEEE Transactions on Nuclear Science
Semiconductor materials and devices
0.83
article

TID Effects in the Lateral STI Oxide of Planar CMOS Transistors

S. Mattiazzo, Simone Gerardin, G. Borghello, F. Faccio, Stefano Bonaldo, Marta Bagatin
article en
4 citations

Abstract

Using comprehensive experimental data and 3-D technology computer-aided design (TCAD) simulations, this article discusses the effects and mechanisms of total ionizing dose (TID) in the lateral shallow trench isolation (STI) in planar CMOS technologies in the 65–28-nm nodes. During irradiation to ultrahigh doses, nMOS transistors often exhibit a continuous increase in the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>-state (leakage) current, while the evolution of the on-current, threshold voltage, and transconductance show a rebound that is considerably more evident in narrow-channel transistors. This difference in the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>- and <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>-state parameters evolution with TID is traceable to variable de-passivation of interface traps in depth along the STI sidewall. While at all depths TID determines a build-up of trapped holes in the STI oxide, only in the shallower portion, a significant number of interface traps are gradually de-passivated leading to an accumulation of negative trapped charge. The different dynamics of hole and electron trapping determine the rebound of the <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-state parameters in typical high-dose-rate experiments, while the increase in off-current is driven by the constant accumulation of trapped holes at larger depths. In pMOS transistors, where interface traps also get positively charged, the degradation of all parameters is constant with TID, larger than for nMOS, and channel width-dependent. This response is consistent across different technology nodes, which highlights the fundamental role of the STI oxide in determining the TID tolerance of MOS transistors in planar technologies with very thin gate oxide (<5 nm).

IEEE Transactions on Nuclear ScienceVol. 72(8)
University of Padua (IT), Istituto Nazionale di Fisica Nucleare (IT), European Organization for Nuclear Research (CH)
Affordable and clean energy
Openalex Percentile: Top 26%
Semiconductor materials and devices
0.83
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