A high-precision, low-power, high-speed, single-slope ADC for infrared FPA digital readout circuit

Column-level ADC DROIC (Digital Readout Integrated Circuit) is widely used in large arrays, small pixels, high frame rates, and low-power digital IRFPA (Infrared Focal Plane Array). In this paper, a high-precision, low-power, highspeed single-slope ADC that can be used for column-level ADC DROIC is proposed. The ADC uses a 13-bit hybrid counter with a 5-bit shared Gray code counter and an 8-bit binary counter, powered by three voltage domains. This design maintains low power consumption while balancing precision and speed. The ADC is designed in a 180nm CMOS process. The layout of the proposed ADC can be implemented in a pixel pitch less than 10μm. The simulation results show that the Differential Nonlinearity (DNL) of the ADC proposed in this paper is -0.7/0.71 LSB, the Integral Nonlinearity (INL) is -0.36/5.7LSB, the Signal to Noise and Distortion Ratio (SNDR) is 75.09 dB, the ENOB is 12.18 bits, and the power consumption at a sampling rate of 100K/s is approximately 36 µW. These results indicate the ADC is suitable for large arrays, small pixels, and low-power IRFPA DROICs.