High-Performance Two-Port SRAM Design and Optimization Based on 12nm Technology

This article introduces a fully custom design of a high-performance, two-port <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$128\mathrm{x}128$</tex> -bit SRAM, utilizing a l2nm process for microprocessor applications. To achieve objectives of high speed, low power consumption, and robust read-write stability, the two-port SRAM circuit was entirely redesigned. Following the circuit design, a comprehensive custom layout was developed, and simulations were conducted to evaluate the read-write functionality, speed, and power consumption. The design operates within a voltage range of 0.6V -1.1 V and a frequency range of 1.2GHz-l.8GHz, covering an area of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5319.9\text{um}^{\wedge}2$</tex>, At a standard operating voltage of IV, the power is 8.luW/Mhz and demonstrates overall superior performance compared to previous designs.