Design of Low On-State Loss IGBT Devices

In order to reduce the on-state loss of Insulated Gate Bipolar Transistors (IGBTs), a device cell structure with carrier storage (CS) layer trench type Insulated Gate Bipolar Transistors (CSTBTs) is designed in this paper. The substrate thickness, substrate resistivity, CS layer injection dose, trench depth, and trench width of the CSTBT were simulated and optimized using the Sentaurus TCAD. The cell structure parameters and process parameters of the device were determined by studying the effect of variation of each parameter on the performance of the device. Test results show that the designed device has low on-state loss and good performance.