CPLD-Based Measurement of FPGA Boot Time

Aiming at the problems of difficulty in testing and observing the boot time of embedded devices, a method based on CPLD is proposed to accurately measure the boot time of various types of embedded devices (FPGA, MCU, DSP, etc.). The method improves the reliability and accuracy of boot time measurement by eliminating the false judgment caused by unstable state through pulse debouncing at the measuring end and pulse delay output at the measured end. In this paper, the traditional double-pulse measurement method is improved by using EPM570T100C5 as the measurement chip, and XC7Z020CLG400-2 as the measured chip as an example to accurately measure the boot time, and its measurement accuracy can reach the nanosecond level.