Class-G Impedance-Modulation Multi-Core Power Oscillator for High P<sub>out</sub> and Power Back-Off Efficiency Enhancement
Power oscillator is promising to directly generate the signal to the output with a high system efficiency. However, the peak output power and the efficiency at deep power back-off (PBO) are limited. In this article, the architecture of impedance-modulation multi-core power oscillator is proposed. The reconfigurable power-combining matching resonator is introduced and analyzed to obtain high efficiencies and low phase noise at peak and PBO states. Meanwhile, the output matching is investigated to maintain the high efficiency along with the tuning of oscillation frequency. To verify the mechanism, a dual-core power oscillator with Class-G supply switching is designed and fabricated in a 40-nm CMOS technology. The digitally controlled tail resistor array is used to tune the output power continuously. Measurements exhibit a 33% tuning range from 2.3 to 3.2 GHz. The peak output power is 10 dBm, while the efficiencies at 0-/3-/6-/9-dB PBOs are 39%, 37%, 33%, and 30%, respectively. The 1-MHz offset phase noise is −131.5 to −127.2 dBc/Hz over the operation frequency.
Authors
- Yiyang Shu (ORCID: https://orcid.org/0000-0002-6606-9057)
- Xun Luo (ORCID: https://orcid.org/0000-0002-1318-9418)
Institutions
- University of Electronic Science and Technology of China (CN)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2024-12-12
- DOI
- https://doi.org/10.1109/jssc.2024.3510417
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China