Design Optimization of the IGBT’s Raising N-Buffer Layer
This paper presents a comparative analysis focusing on the design of the Raised N-buffer layer of IGBT (RN-IGBT), as opposed to the traditional FS-IGBT, with validation conducted utilizing the Silvaco Technology Computer-Aided Design (TCAD) platform. The RN-IGBT structure features a quasi-neutral N-drift region insert into Negative-type buffer layer and Positive-type collector region. Additionally, the raised N -buffer layer in the drift region results in $\mathbf{4. 7 \%}$ improvement of critical breakdown voltage for the same on-state losses or, up to $22 \%$ turn-off losses reduction, while preserving the same level of on-state voltage decrement, as compared to a standard FS-IGBT configuration. The utilization of RN-IGBT extends to RC-IGBT implementations, enabling the mitigation of snapback phenomena.
Authors
- K. Hu (ORCID: https://orcid.org/0009-0008-6707-0982)
- Chong Shen (ORCID: https://orcid.org/0000-0001-9023-7789)
- Wei Yuan (ORCID: https://orcid.org/0000-0002-8143-231X)
- Xiaodong Zhang (ORCID: https://orcid.org/0000-0003-4000-4180)
- Linlin Zhang (ORCID: https://orcid.org/0000-0002-2819-9803)
- Haiyu Qiu
Institutions
- Hainan University (CN)
- Hainan Tropical Ocean University (CN)
Publication Details
- Published
- 2024-09-27
- DOI
- https://doi.org/10.1109/icepg63230.2024.10775432
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Hainan University