Design a chaotic circuit using tunable and power efficient memristor emulator circuit for image encryption

Abstract In a non-linear dynamic system, chaos is a deterministic phenomenon that arises when the state vector trajectories become highly sensitive to the initial conditions, given certain criteria and periodic. The memristor, being the fourth essential component of a two-terminal device, has the potential to overcome the barrier for secure communication against eavesdroppers and manufacturing of duplicate chaotic transrecivers by the untrusted foundaries.It can close a gap among secure manufacturing and reliable communication because its resistance can be programmed by the designer not by the foundary. This property makes the communication system more efficient, reliable secure, and provides more security. In this study, the memristor and analog design of a chaotic transreviver is designed. The memristor model is designed using a Current mirror operational transconductance amplifier (OTA) and an analog multiplier with sinusoidal input having amplitude ( V m ) and input frequency (f). Variations in input frequency, and amplitude have an impact on conductance and resistance state and the OTA parameter g m Also affects the V-I response. The research focuses on memristor tunability with a variation of the hysteresis curve using factors such as temperature, amplitude, load resistance, frequency, and incremental and decremental behavior and secure communication using a Chaotic circuit using memristor. The maximum operational frequency that exhibits a pintch hystresis curve is 100 kilohertz, and a power dissipation of 3.1 μW with noise 56 nV/Hz 1/2 The results also show the chaotic system are sensitive with their secret key or starting conditions of integrator which is uses for the encryption approach.