nMatrix: A New Decoding Algorithm for the Matrix ECC

The shrinkage of electronic devices increases the probability of memory error due to the rising sensitivity to radiation; memories targeting critical applications employ Error Correction Codes (ECCs) to mitigate this problem. This paper presents the nMatrix decoding algorithm that improves the original work of Matrix, reducing the decoder implementation costs and raising the error correction rate. We evaluated nMatrix through experiments injecting exhaustive and adjacent error patterns. Additionally, we analyzed and compared an nMatrix version targeting 32 data bits with some ECC configurations regarding error correction efficacy, reliability, and implementation costs. nMatrix has an adjacent error correction rate higher than Matrix, up to six errors, except for two bitflips, and higher reliability for almost the entire period analyzed. Finally, the synthesis results show that nMatrix has lower costs than Matrix, except for the decoder delay.

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Published
2024-11-26
DOI
https://doi.org/10.1145/3697090.3697091
Primary Topic
VLSI and Analog Circuit Testing
Type
article
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article

nMatrix: A New Decoding Algorithm for the Matrix ECC

Lírida Naviner, Alexandre Coelho, Jarbas Silveira, César Marcon et al.
VLSI and Analog Circuit Testing
article

nMatrix: A New Decoding Algorithm for the Matrix ECC

Lírida Naviner, Alexandre Coelho, Jarbas Silveira, César Marcon, David Freitas, David Freitas Moura Mota
article en

Abstract

The shrinkage of electronic devices increases the probability of memory error due to the rising sensitivity to radiation; memories targeting critical applications employ Error Correction Codes (ECCs) to mitigate this problem. This paper presents the nMatrix decoding algorithm that improves the original work of Matrix, reducing the decoder implementation costs and raising the error correction rate. We evaluated nMatrix through experiments injecting exhaustive and adjacent error patterns. Additionally, we analyzed and compared an nMatrix version targeting 32 data bits with some ECC configurations regarding error correction efficacy, reliability, and implementation costs. nMatrix has an adjacent error correction rate higher than Matrix, up to six errors, except for two bitflips, and higher reliability for almost the entire period analyzed. Finally, the synthesis results show that nMatrix has lower costs than Matrix, except for the decoder delay.

Télécom Paris (FR), Universidade Federal do Ceará (BR), Instituto Federal de Educação, Ciência e Tecnologia do Ceará (BR), Pontifícia Universidade Católica do Rio Grande do Sul (BR)
Openalex Percentile: Top 76%
VLSI and Analog Circuit Testing
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