A method of combing optical proximity correction and design layout optimization to improve process window

As semiconductor process technology advanced and integrated circuits design layout complexity escalated, process weak points detection plays an important role in the manufacture, which affects the final yield of the production. Design-Technology Co-Optimization (DTCO) is also proposed to reduce the cost and cycle time from design to market in advanced process development. Sub-Resolution Assist Feature (SRAF) is a common method adopted extensively in Optical Proximity Correction (OPC) to improve process window, the main challenge is balancing SRAF size, location, process window and printing issue. In this work, we take the advantages of OPC process simulation to proactively identify potential weak points and analyze which regions need to be modified to enlarge process margin, meanwhile provided guidelines to remove process un-friendly pattern or optimize design layout.