Source-mask co-optimization study for typical EUV design rule patterns with 40nm minimum pitch

Source-Mask Co-Optimization (SMO) techniques have significantly supported semiconductor manufacturing quality by enhancing imaging contrast and lithographic process control in advanced lithography nodes over the past decade. Through jointly optimizing the design of the illumination source and modifying the reticle patterns on the mask, the SMO technique has provided a viable method to find the best photo process for a given design rule. In SMO, process parameters such as the Exposure Latitude (EL), the Depth of Focus (DoF), the Mask Error Factor (MEF) can be improved through the definition of a cost function. For EUV, there is an added issue that the optical axis is not normal to the reticle. Although the optical axis is normal to the wafer, there still exists shadowing effect and horizontal-vertical linewidth bias (H-V bias) that needs to be considered. Therefore, in our SMO program, we also put the illumination telecentricity at wafer plane into consideration, which may help reduce pattern shift at defocus positions. In this presentation, we provide an example with a minimum pitch of 40 nm, which is commonly used for the 2~3 nm Back-End-Of-the-Line (BEOL) logic technology nodes. In this example, we will discuss the challenges and potential of our SMO technique and we will offer recommendations for EUV SMO implementations in advanced EUV technology nodes. Our analysis indicates that SMO can continue to improve optimal pattern transfer capabilities by simultaneously optimizing both illumination source and mask design.