High Fill-Factor Pixel Architecture for a Dynamic Vision Sensor Utilizing Column-Parallel Readout Scheme

Dynamic vision sensors (DVSs) are extensively utilized in machine vision applications due to their low latency and minimal power consumption. Conventional DVS architectures, however, suffer from a low fill factor (FF) owing to a pixel design that includes two capacitors. These capacitors are crucial for setting the gain used to amplify signals from a photoreceptor. Typically, this in-pixel gain, determined by the ratio of these capacitors, is maintained above 20 to enhance the temporal contrast (TC) sensitivity of the sensor, which consequently reduces the FF. To address this limitation, our proposed DVS architecture incorporates a column-parallel differential amplifier that redistributes the in-pixel gain to an external pixel readout mechanism. However, this modification introduces an increase in fixed pattern noise (FPN) due to additional column-level amplification lacking offset compensation. To address this issue, a replica of the in-pixel amplifier coupled with a delta-difference subtraction (DDS) technique has been integrated into the sensor design, aiming to alleviate FPN without compromising sensitivity. A prototype of the sensor, fabricated using a standard 180-nm CMOS process, was tested to evaluate performance parameters such as FPN and sensitivity. This prototype achieved an FF of 33%, a significant improvement over the conventional design while maintaining a TC sensitivity of approximately 16%.