Design and temperature analysis of tree-shaped nanosheet FET for analog and RF applications

Abstract An innovative breakthrough that addresses the shortcomings of FinFET is the use of tree-shaped Nanosheet FET. This study examines the temperature dependence of the performance of 12 nm Tree-shaped NSFET on DC and analog/RF properties using a gate stack of high-k HfO 2 and SiO 2 . From 200 K to 350 K, a detailed DC performance analysis was performed, including the transfer characteristics (I D vs V GS ), output characteristics (I D versus V DS ), subthreshold swing (SS), and I ON /I OFF ratio. Additionally, we examined how temperature influence power consumption, dynamic power, and the ON–OFF performance metric (Q). Having the off current lesser than nA at all the temperatures, the proposed device shows good I ON /I OFF switching performance. At an L G of 12 nm, the cutoff frequency (f T ) is found to be in the Tera Hz region, and the Q varies from 0.9 to 5.1 μS-dec mV −1 at temperatures between 200 K and 350 K. Additionally, the impact of IB height (H IB ) is investigated at 15–25 nm with the step of 5 nm and the impact of IB width (W IB ) is investigated at 3–5 nm on Tree-shaped NSFET and the impact of variation in the work function is also done in this paper. The effect of scaling with different gate lengths from 20 nm down to 10 nm and its DC characteristics are examined in this paper. The power consumption of the Tree-shaped NSFET increases with temperature. From all these results, the proposed Tree-shaped NSFET shows great potential as a high-frequency competitor at the nanoscale.