Optimized Timing Control for Leading-Edge Aligned Modulation of a T-Type Bridge in Unfolding-Based AC–DC Converters

T-type primary bridge-based resonant converters employed in unfolding-based single-stage ac–dc conversion systems commonly adopt a leading-edge aligned modulation strategy, as it facilitates zero-voltage switching (ZVS) throughout the grid cycle. However, the application of this modulation strategy can result in partial ZVS of the common-source <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small>s within the T-type bridge. In this letter, we investigate the underlying reasoning of such partial ZVS, quantify the severity of the problem, and propose a mitigation solution. Specifically, an optimized leading-edge aligned modulation strategy is introduced, incorporating an intentional staggered time delay for the turn-<sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small> of the common-source <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small>s during the leading edge. The proposed modulation strategy is validated through hardware testing on a 20-kW unfolding-based ac–dc conversion system.