An FPGA-Accelerated Approach to Direct Waveform Processing for Low-Power Keyword Spotting

Natural language processing is typically high-power-consuming, hence we require a gating switch to activate the natural language processing system only when needed. The gating switch is the keyword-spotting system, which is always kept in an open state; therefore, it is essential to ensure the system operates with low power consumption. To address this issue, this paper firstly introduces a convolutional algorithm that directly convert voice signals into Mel-frequency cepstral coefficients features. Compared to traditional feature extractors, this algorithm significantly reduces computational load, thereby lowering power consumption. Subsequently, in order to further reduce computational load and lower power consumption, we introduced a classifier with weight binarization. To enhance the accuracy of this classifier, a two-step distillation method was proposed. Finally, this article presents an FPGA-based hardware accelerator that implements accelerated inference computation for a KWS engine within an FPGA. Compared to a high-performance general-purpose processor (Intel Core i5-12400F), the FPGA-based pattern recognition engine hardware accelerator achieves a speedup of 28.6 times, while its power consumption is only 4.2% of that of the i5-12400F.