Adaptive Hardware Security: Leveraging FPGA and Processor Synergy for Reliable PUFs

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SPIRE - Sciences Po Institutional REpository
Published
2024-11-13
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
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article
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article

Adaptive Hardware Security: Leveraging FPGA and Processor Synergy for Reliable PUFs

Giorgio Di Natale
SPIRE - Sciences Po Institutional REpository
Physical Unclonable Functions (PUFs) and Hardware Security
article

Adaptive Hardware Security: Leveraging FPGA and Processor Synergy for Reliable PUFs

Giorgio Di Natale
article en

Abstract

No abstract available for this paper.
SPIRE - Sciences Po Institutional REpository
Techniques of Informatics and Microelectronics for Integrated Systems Architecture (FR)
Affordable and clean energy
Openalex Percentile: Top 76%
Physical Unclonable Functions (PUFs) and Hardware Security
Open Access PDFOpenAlex
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Adaptive Hardware Security: Leveraging FPGA and Processor Synergy for Reliable PUFs — Giorgio Di Natale · SPIRE - Sciences Po Institutional REpository (2024) | TGRS Research Map | TGRS