Securing SoC Processors by Routing Memory Transactions Through FPGA Fabric

This paper explores a radical approach to mitigating unintended software changes, persistent malicious implants, and zero-day exploits on System-on-Chip (SoC) architectures, such as the Xilinx UltraScale MPSoC. The approach creates a hardware root-of-trust by routing all memory transactions through the SoC’s on-chip Field Programmable Gate Array (FPGA) to allow inline monitoring, validation, interception, and corrective techniques. Two distinct formulations are presented and evaluated. The first leverages on-chip Random Access Memory (RAM) directly associated with the SoC’s Processing System (PS); this involves channeling memory transactions through the FPGA and back to the PS using a custom hardware module for address translation. The second leverages off-chip RAM that is exclusively reachable via the FPGA fabric which thereby sits in line between the PS and its memory. Performance results are presented for a wide variety of memory access patterns by running Linux on a ZCU102 development board. This board provides an MPSoC with both RAM configurations, using realistic clock speeds: the multi-core PS operates at 1.2GHz and the associated FPGA fabric operates at 300MHz. The results indicate that the performance overhead typically incurs a 1.5 to 4-fold slowdown that, while significant, represents acceptable values for many mission-critical, high-value applications.