Sneak Circuit Analysis Covering Interface Circuits in Spacecraft Integrated Chips while Considering Faults

Sneak circuit analysis is a crucial reliability design process. In the design of spacecraft electronic systems, it is challenging to identify sneak circuits related to integrated chip interface circuits, and there are few targeted researches. In extreme working conditions, the coupling sneak circuits caused by the failure of integrated chips are difficult to identify, affecting the design optimization. The paper proposes a typical interface information specification model for integrated chips to simulate the electrical information characteristics of interfaces. And the typical failure models of intrinsic components inside the chip are determined through multi-physics field analysis. Then, based on the digital model, a sneak circuit diagnosis process based on excitation and fault injection are proposed, and a sneak circuit screening method based on Python virtual prototyping is implemented in the case study. Finally, the design constraint clues for the chip’s external circuit are obtained, which provides a reference for related fault diagnosis and reliability optimization works.

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Publication Details

Published
2024-10-11
DOI
https://doi.org/10.1109/srse63568.2024.10772492
Citations
1
Primary Topic
Radiation Effects in Electronics
Type
article
Field-Weighted Citation Impact
0.21
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Sneak Circuit Analysis Covering Interface Circuits in Spacecraft Integrated Chips while Considering Faults

Mingtao Feng, Guofu Zhai, Cen Chen, Weiming Liu et al.
1 citations
Radiation Effects in Electronics
0.21
article

Sneak Circuit Analysis Covering Interface Circuits in Spacecraft Integrated Chips while Considering Faults

Mingtao Feng, Guofu Zhai, Cen Chen, Weiming Liu, Haonan Zhang, Kaiwen Xiao
article en
1 citations

Abstract

Sneak circuit analysis is a crucial reliability design process. In the design of spacecraft electronic systems, it is challenging to identify sneak circuits related to integrated chip interface circuits, and there are few targeted researches. In extreme working conditions, the coupling sneak circuits caused by the failure of integrated chips are difficult to identify, affecting the design optimization. The paper proposes a typical interface information specification model for integrated chips to simulate the electrical information characteristics of interfaces. And the typical failure models of intrinsic components inside the chip are determined through multi-physics field analysis. Then, based on the digital model, a sneak circuit diagnosis process based on excitation and fault injection are proposed, and a sneak circuit screening method based on Python virtual prototyping is implemented in the case study. Finally, the design constraint clues for the chip’s external circuit are obtained, which provides a reference for related fault diagnosis and reliability optimization works.

Harbin Institute of Technology (CN), Beijing Aerospace Flight Control Center (CN)
Affordable and clean energy
Openalex Percentile: Top 45%
Radiation Effects in Electronics
0.21
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