Optimization of JFET region for 1.2kV SiC HEXFETs with 3D TCAD Simulations

1.2kV 4H-SiC MOSFETs with linear and hexagonal (HEXFET) layouts were fabricated simultaneously with both nominal and heavy doping concentrations in the JFET region. The static electrical characteristics were then compared and evaluated. The HEXFET with heavy JFET doping exhibited the lowest specific on-resistance ($\mathrm{R}_{\mathrm{on}, \mathrm{sp}}$). However, its breakdown voltage (BV) was significantly lower compared to the linear MOSFET with heavy JFET doping, indicating that the degradation in the blocking characteristics stems from a weakness in the HEXFET layout design. To further investigate, 3D TCAD blocking simulations were conducted to directly compare the linear and hexagonal layouts with the same JFET doping. These simulations reveal that the corner created in the JFET region by the hexagonal geometry is the source for the degradation in the blocking characteristics. Not only is the electric field in the gate oxide significantly higher in the center of this corner region, but there is significant electric field crowding underneath the surrounding p-well corners in the SiC.