Robust and Lightweight Challenge Obfuscation Mechanism for Anti-modeling Protection of Arbiter-PUFs

Abstract Physically unclonable functions (PUFs) are lightweight hardware security primitives that leverage the imperfection of the manufacturing process of integrated circuits to generate unique signatures (responses) when queried by various bit-strings (challenges). These signatures can be used not only to authenticate interconnected devices but also to generate cryptographic keys for preserving the integrity and confidentiality of data. Among the different designs, the arbiter-PUF and its variants have received the most attention due to the large cardinality of their challenge-response set. To prevent the PUF circuits from being modeled using machine learning techniques, challenge obfuscation is often being pursued. Particularly, the simplicity of bit scrambling makes it an attractive means to achieve such a goal without diminishing the low complexity advantages of PUFs. This paper first shows that the conventional, fixed pattern-based, bit scrambling scheme is vulnerable by developing a detailed attack scenario. Then, we propose a novel lightweight dynamic challenge scrambling (DCS) mechanism that predictably varies the bit-swapping pattern per packet and per node. Such variability severely degrades the PUF modeling accuracy. The results extracted from the FPGA implementation of DCS confirm its effectiveness in thwarting PUF modeling attacks.

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Publication Details

Journal
Journal of Hardware and Systems Security
Published
2024-12-01
DOI
https://doi.org/10.1007/s41635-024-00157-3
Primary Topic
Physical Unclonable Functions (PUFs) and Hardware Security
Type
article
Field-Weighted Citation Impact
0.00

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article

Robust and Lightweight Challenge Obfuscation Mechanism for Anti-modeling Protection of Arbiter-PUFs

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Robust and Lightweight Challenge Obfuscation Mechanism for Anti-modeling Protection of Arbiter-PUFs

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article en

Abstract

Abstract Physically unclonable functions (PUFs) are lightweight hardware security primitives that leverage the imperfection of the manufacturing process of integrated circuits to generate unique signatures (responses) when queried by various bit-strings (challenges). These signatures can be used not only to authenticate interconnected devices but also to generate cryptographic keys for preserving the integrity and confidentiality of data. Among the different designs, the arbiter-PUF and its variants have received the most attention due to the large cardinality of their challenge-response set. To prevent the PUF circuits from being modeled using machine learning techniques, challenge obfuscation is often being pursued. Particularly, the simplicity of bit scrambling makes it an attractive means to achieve such a goal without diminishing the low complexity advantages of PUFs. This paper first shows that the conventional, fixed pattern-based, bit scrambling scheme is vulnerable by developing a detailed attack scenario. Then, we propose a novel lightweight dynamic challenge scrambling (DCS) mechanism that predictably varies the bit-swapping pattern per packet and per node. Such variability severely degrades the PUF modeling accuracy. The results extracted from the FPGA implementation of DCS confirm its effectiveness in thwarting PUF modeling attacks.

Journal of Hardware and Systems SecurityVol. 8(4)
Leidos (United States) (US), Johns Hopkins University (US), Johns Hopkins University Applied Physics Laboratory (US), University of Maryland, Baltimore County (US)
Johns Hopkins University
Peace, Justice and strong institutions
Openalex Percentile: Top 76%
Physical Unclonable Functions (PUFs) and Hardware Security
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