Design Of A Phase-Locked Loop Using Current Starved Voltage Controlled Ring Oscillator In 45nm Technology
This paper discovers a PLL core design that can achieve wide range of frequency. As we know that the main block of PLL is voltage control oscillator (VCO). For achievement of high oscillation frequency, good stability, a ring oscillator that uses current starving technique has been designed. Based on the circuit the PLL is designed using Cadence tool in 45 nm technology.
Authors
- M. Maniteja
- Sravan K. Vittapu (ORCID: https://orcid.org/0000-0002-9627-8562)
- Vidyashree Nandini (ORCID: https://orcid.org/0000-0002-4439-7957)
- T Reddy (ORCID: https://orcid.org/0009-0004-1919-3807)
- Ravi Chand Sankuru
- S.Sai Aashrith
Publication Details
- Journal
- Nanotechnology Perceptions
- Published
- 2024-11-04
- DOI
- https://doi.org/10.62441/nano-ntp.vi.2893
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00