Design of a Novel Fast DC Fault Current Limiter Prototype
With the rapid development of the DC distribution network, the method of limiting the rapid rise of current after a short-circuit fault on the DC side has become a research hotspot. This paper proposes a new DC fault current limiter (FCL) topology and its prototype design scheme. The topology converts DC into AC through the IGBT bridge during fault and uses the characteristics of low-frequency resistance and high frequency of reactor to limit current. Secondly, this paper optimizes the main equipment parameters of the proposed FCL prototype, selects the current limiting reactance, Hall sensor, drive plate and arrester, and uses AutoCAD to design the appearance and overall layout of the current limiting prototype. At the same time, the hardware and software of the control and protection system are designed. Based on the RS232 serial port, the software program communicates with the host computer to analyze the operating state of the current limiter under normal operation and fault period. Finally, the reliability and superiority of the FCL control system and current limiting characteristics proposed in this paper are verified by comparing the experiment with the RT-LAB semi-physical simulation data.
Authors
- Yi Gao (ORCID: https://orcid.org/0000-0001-5560-7836)
- Jinyi Deng (ORCID: https://orcid.org/0000-0003-3169-0852)
- Jun Wei
- Yufei Zhang (ORCID: https://orcid.org/0000-0001-8786-4845)
- Peitao Wang (ORCID: https://orcid.org/0000-0003-2871-3355)
- Huan Guo (ORCID: https://orcid.org/0000-0003-2266-5196)
- Y Zhong
Institutions
- Beijing Normal-Hong Kong Baptist University (CN)
- Jinan University (CN)
Publication Details
- Published
- 2024-09-20
- DOI
- https://doi.org/10.1109/icpre62586.2024.10768645
- Primary Topic
- HVDC Systems and Fault Protection
- Type
- article
- Field-Weighted Citation Impact
- 0.00