A CMOS Flash LiDAR Sensor With In-Pixel Zoom Histogramming Time-to-Digital Converters
This article presents a solid-state flash light detection and ranging (LiDAR) sensor with an in-pixel zoom histogramming time-to-digital converter (hTDC). The proposed zoom hTDC combines two different conversion techniques such as the direct time-of-flight (ToF) and indirect ToF (iToF), realizing a two-step coarse-fine TDC architecture based on a single 10-b histogramming-bit (Hb) time-gated event/linear up-down counter (UDC). A 6-b time-bit (Tb) coarse TDC is implemented with a successive approximation (SA) algorithm in that the ToF value is found out by the binary search manner, dramatically reducing the number of memories from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2{^{T_{\text {b}}} \times \text { H}_{\text {b}}}$ </tex-math></inline-formula> to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${T_{\text {b}}} {+}$ </tex-math></inline-formula> Hb. The UDC is utilized for counting the single-photon avalanche diode (SPAD) events for calculating the histogram in the coarse SA-hTDC mode, while it is reconfigured to the up-counter for estimating the phase difference which is taken by a ratio of linear counts between adjacent coarse bins in the fine iToF mode. Fabricated in a 110-nm CIS process, the prototype flash LiDAR sensor with a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$100{\times } 76$ </tex-math></inline-formula> pixel array demonstrates a 20-fps depth imaging acquisition in indoor environments. A 10-fps depth imaging at outdoor environments up to 10-m range consumes 154.5 mW. The maximum detectable range of 50 m is measured, and the depth resolutions of both to-digital converters (TDCs) are given by 150 and 9 cm, respectively, under an infrared (IR) emitter with a peak power of 75 W and a duty cycle of 0.08%.
Authors
- Seonghyeok Park (ORCID: https://orcid.org/0000-0001-5341-2293)
- Jung‐Hoon Chun (ORCID: https://orcid.org/0000-0002-2668-6739)
- Su-Hyun Han
- Jaehyuk Choi (ORCID: https://orcid.org/0000-0002-6837-4856)
- Bumjun Kim (ORCID: https://orcid.org/0000-0002-2198-5342)
- Seong-Jin Kim
Institutions
- Ulsan National Institute of Science and Technology (KR)
- Sungkyunkwan University (KR)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2024-12-04
- DOI
- https://doi.org/10.1109/jssc.2024.3508614
- Citations
- 4
- Primary Topic
- CCD and CMOS Imaging Sensors
- Type
- article
- Field-Weighted Citation Impact
- 0.83