Cross-Layer Modeling and Design of Content Addressable Memories in Advanced Technology Nodes for Similarity Search
In this article, we present a comprehensive design and benchmarking study of content addressable memory (CAM) at the 7-nm technology node in the context of similarity search applications. We design CAM cells based on static random access memory (SRAM), spin-orbit torque (SOT), and ferroelectric field effect transistor devices and from their layouts extract cell parasitics using state-of-the-art electronic design automation (EDA) tools. These parasitics are used to develop SPICE netlists to model search operations. We use a CAM-based dataset search and a sequential recommendation system (RS) to highlight the application-level performance degradation due to interconnect parasitics. We propose and evaluate two solutions to mitigate interconnect effects.
Authors
- Piyush Kumar (ORCID: https://orcid.org/0000-0003-0760-7166)
- Azad Naeemi (ORCID: https://orcid.org/0000-0003-4774-9046)
- Mohammad Adnaan (ORCID: https://orcid.org/0000-0002-9032-3393)
- Siri Narla (ORCID: https://orcid.org/0000-0003-0039-9026)
Institutions
- Georgia Institute of Technology (US)
Publication Details
- Journal
- IEEE Transactions on Electron Devices
- Published
- 2024-12-04
- DOI
- https://doi.org/10.1109/ted.2024.3506509
- Citations
- 1
- Primary Topic
- Advanced Computing and Algorithms
- Type
- article
- Field-Weighted Citation Impact
- 1.96