Exploring Switching Behavior of Dual-Gate RF GaN HEMTs: Characterization and Modeling

This letter presents a comprehensive performance analysis and both linear and nonlinear modeling of dual-gate gallium nitride (GaN)-on-silicon (Si) depletion mode high electron mobility transistor (HEMT) devices across various switch topologies. We evaluate large-signal behavior to assess power handling capabilities in three configurations: series, shunt, and single-pole single-throw (SPST) at 6.5 GHz. For the SPST switch at 500 MHz, measurements reveal an <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-resistance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$R_{\text {on}}$ </tex-math></inline-formula>) of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.7~\Omega {\cdot }\text {mm}$ </tex-math></inline-formula>, <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</small>-capacitance (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$C_{\text {off}}$ </tex-math></inline-formula>) of 53.3 fF, peak insertion loss (IL) of 0.6 dB, and isolation (ISO) of 53.3 dB. These metrics are also evaluated across six different peripheries, ranging from NF<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\cdot $ </tex-math></inline-formula> W =400 to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$6400~\mu $ </tex-math></inline-formula> m. In addition, we introduce and validate a surface potential-based modeling framework for dual-gate RF GaN HEMTs using <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small>-wafer dc measurements, common-gate S-parameters, and large-signal measurements. Furthermore, we explore the potential single-pole-double-throw (SPDT) design by utilizing SPST switch S2P files in conjunction with model results.