A High-Voltage-Compliant 86% Peak Efficiency Current-Mode Stimulator With Dynamic Voltage Supply for Implantable Medical Devices
This article introduces a high-voltage (HV) compliant, energy-efficient current-mode stimulator featuring a proposed boost-based dynamic voltage supply (DVS) to minimize the voltage dropout. The stimulator employs an activate-on-demand asynchronous strategy, instructing the boost converter to generate the dynamically increased high voltage that tracks the electrode’s voltage drop, thus achieving a near-adiabatic stimulation. The strategy relies on measuring the boost’s varying voltage conversion ratio (VCR), which is facilitated by an 8-bit voltage ratio quantizer (VRQ) proposed in this article. Furthermore, the boost converter employs a low-power, fast-speed, HV gate driver (HVGD) to control its p-type power switch that connects the inductor to the HV output. This article also presents a dedicated digital circuit that generates the pulse signals for controlling the n-type power switch and the HVGD. This digital circuit is driven by a five-phase clock from a current-starved ring oscillator. A highly efficient rotationally symmetric level shifter is utilized for the ring oscillator’s output, translating its level and improving its rise/fall time. The boost converter reaches a peak efficiency of 90.2%, enabling the stimulator to achieve an end-to-end energy efficiency of up to 86% during a biphasic stimulation of 6 mA. The stimulator IC, fabricated using 0.18-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\boldsymbol {\mu }\mathbf {m}$ </tex-math></inline-formula> bipolar-CMOS–DMOS (BCD) technology, occupies a compact area of 2.16 mm2. It exhibits low static power consumption at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.78~\boldsymbol {\mu }\mathbf {W}$ </tex-math></inline-formula>, promising battery-powered implants with an extended lifetime and a reduced form factor.
Authors
- Wengao Lu (ORCID: https://orcid.org/0000-0002-8990-4844)
- Yacong Zhang (ORCID: https://orcid.org/0000-0003-0708-940X)
- You You (ORCID: https://orcid.org/0000-0002-2205-0530)
- Yihan Zhang (ORCID: https://orcid.org/0000-0002-1513-3784)
- Zhongjian Chen (ORCID: https://orcid.org/0000-0003-4211-5511)
- Ruizhi Tian
Institutions
- Hong Kong University of Science and Technology (HK)
- Peking University (CN)
Publication Details
- Journal
- IEEE Journal of Solid-State Circuits
- Published
- 2024-12-04
- DOI
- https://doi.org/10.1109/jssc.2024.3505059
- Citations
- 8
- Primary Topic
- Neuroscience and Neural Engineering
- Type
- article
- Field-Weighted Citation Impact
- 2.15
Funders
- National Key Research and Development Program of China