Mechanism and Quantitative Modeling of the SRAM Soft Error Induced by Space Electrostatic Discharge
This study investigates the characteristics, sensitive regions, failure mechanism, and quantitative model of the SRAM soft errors caused by spacecraft charging-induced electrostatic discharge (SESD) in HSPICE simulations. The results revealed that ‘1-0’ bit upset was one of the main characteristics of the soft errors caused by the SESD. The SESD-sensitive regions were located at the sense amplifier (AMP) and the 6T bit-cell array, with the SESD injecting at the power supply nodes. The main failure mechanisms are the reduction in the voltage difference between the two output nodes of the AMP and the recoverable breakdown in the P-channel metal oxide semiconductor (PMOS) of the 6T-cell, which is induced by the SESD transients. The quantization calculation model of the soft error induced by SESD for SRAM was established via MATLAB according to its failure mechanism, which bridged the characteristics of the SESD transient with the SRAM soft error to quickly evaluate the SESD errors. In addition, the quantization model was preliminarily verified via SESD experiments.
Authors
- Run-Jie Yuan
- Rui Chen (ORCID: https://orcid.org/0000-0002-6128-1657)
- Z.-Y. Wang (ORCID: https://orcid.org/0009-0000-0545-8609)
- Huanling Yu (ORCID: https://orcid.org/0000-0002-4107-2305)
- J.-W. Han Y.-N. Liang
Institutions
- Chinese Academy of Sciences (CN)
- National Space Science Center (CN)
Publication Details
- Journal
- IEEE Transactions on Device and Materials Reliability
- Published
- 2024-12-04
- DOI
- https://doi.org/10.1109/tdmr.2024.3510716
- Citations
- 1
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.21
Funders
- National Natural Science Foundation of China
- National Key Research and Development Program of China