A Low Offset Capacitive Gain Amplifier for High Common Mode Voltage Sense in Battery Management System Application

There is an increasing request for interfacing high input common mode (CM) voltages in voltage or current sense such as battery management system. This paper proposes a capacitive gain amplifier (CGA) designed to sample the differential mode (DM) voltage of signals with a CM voltage that varies from 0 to 90V. A control strategy that integrates chopping and auto zero (AZ) is used to reduce the input offset voltage. This control strategy also accelerates the CM voltage establishment of the CGA. A high-voltage switch (HV Switch) has been designed to ensure that the CM voltage of the input signal reaches 90V, while the DM voltage reaches 5V. A linear trim method is proposed to reduce gain error. The CGA has been manufactured in the DBhitek 0.18-μm CMOS process. As the Vcm varies from 0 to 90V, the circuit has an offset voltage of 3.8μV, an output noise of 71.8nV/Hz1/2 and a gain error of 0.0056%.

Authors

Publication Details

Journal
IEICE Transactions on Electronics
Published
2024-12-04
DOI
https://doi.org/10.1587/transele.2024cdp0002
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
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article

A Low Offset Capacitive Gain Amplifier for High Common Mode Voltage Sense in Battery Management System Application

Rong Jin, Yukai Lin, Tianting Zhao, Yongshan Hu et al.
IEICE Transactions on Electronics
Analog and Mixed-Signal Circuit Design
article

A Low Offset Capacitive Gain Amplifier for High Common Mode Voltage Sense in Battery Management System Application

Rong Jin, Yukai Lin, Tianting Zhao, Yongshan Hu, Shunmin Wu, Yidong Yuan
article en

Abstract

There is an increasing request for interfacing high input common mode (CM) voltages in voltage or current sense such as battery management system. This paper proposes a capacitive gain amplifier (CGA) designed to sample the differential mode (DM) voltage of signals with a CM voltage that varies from 0 to 90V. A control strategy that integrates chopping and auto zero (AZ) is used to reduce the input offset voltage. This control strategy also accelerates the CM voltage establishment of the CGA. A high-voltage switch (HV Switch) has been designed to ensure that the CM voltage of the input signal reaches 90V, while the DM voltage reaches 5V. A linear trim method is proposed to reduce gain error. The CGA has been manufactured in the DBhitek 0.18-μm CMOS process. As the Vcm varies from 0 to 90V, the circuit has an offset voltage of 3.8μV, an output noise of 71.8nV/Hz1/2 and a gain error of 0.0056%.

IEICE Transactions on ElectronicsVol. E108.C(7)
Affordable and clean energy
Openalex Percentile: Top 79%
Analog and Mixed-Signal Circuit Design
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A Low Offset Capacitive Gain Amplifier for High Common Mode Voltage Sense in Battery Management System Application — Rong Jin, Yukai Lin, et al. · IEICE Transactions on Electronics (2024) | TGRS Research Map | TGRS