High-performance InGaZnO/Ga2O3 heterostructure TFTs Gated by high-k Ta1.0La0.4O3.8 fabricated at room temperature

• High-performance InGaZnO/Ga 2 O 3 heterostructure TFTs with high-k TaLaO gate dielectric are obtained via room-temperature sputtering with advantages of high processing compatibility and ultralow-thermal budget. • Post-deposition plasma treatments at room temperature are performed on the high-k TaLaO gate dielectrics to improve the interfacial quality and device performance. • An ultralow subthreshold swing of 82.1 mV/dec, an ultrahigh on/off ratio of 4.1 × 10 10 , and a high mobility of 68.0 cm 2 /V·s are obtained for the O 2 -plasma-treated device. High-performance indium-gallium-zinc-oxide (InGaZnO)/gallium oxide (Ga 2 O 3 ) heterostructure thin-film transistors (TFTs) featuring high-k tantalum-lanthanum-oxide (TaLaO) gate dielectric have been successfully fabricated via room-temperature sputtering. As investigated by atomic force microscopy (AFM) and x-ray photoelectron spectroscopy (XPS), the high-k Ta 1.0 La 0.4 O 3.8 can be effectively smoothened by post-deposition plasma treatments at room temperature, suppressing interfacial defects of oxygen vacancies to improve interfacial quality. Remarkably, the electrical characteristics of the heterostructure TFTs are significantly improved by the O 2 -plasma treatment to yield an ultralow subthreshold swing ( SS ) of 82.1 mV/dec, an ultrahigh on/off ratio ( I ON / I OFF ) of 4.1 × 10 10 , and a high field-effect mobility ( µ FE ) of 68.0 cm 2 /V·s. This work presents an innovative method that is effective, ultralow-thermal-budget, and cost-efficient for high-performance heterostructure TFTs with high-k gate dielectrics.