Sparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse

Sparse Tensor Algebra (STA) applications are limited by data movement and can benefit from better data reuse. Prior research has focused on intra-operator data reuse, such as better dataflow or caching technique for a single STA operation, missing other reuse opportunities at the application level. By expressing STA applications as sparse tensor dataflow graphs, we first identify two unexplored inter-operator data reuse opportunities: 1) producer-consumer reuse and 2) cross-iteration reuse. Producer-consumer reuse combines multiple operations to reduce data movement for intermediate results. Cross-iteration data reuse, a new opportunity identified in this paper, reduces the data movement for the shared sparse data (e.g., graph) across iterations. We then propose Output-stationary-_Element-wise-Input-stationary (OEI) dataflow, a novel dataflow to capture both reuse opportunities in STA applications, and Sparsepipe, a sparse dataflow architecture to support the OEI dataflow and maximize data reuse. Evaluation results show that Sparsepipe with OEI dataflow is 19.82×/4.65× faster than CPU/GPU and 1.77× faster than an ideal sparse accelerator that cannot exploit inter-operator reuse.

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Publication Details

Published
2024-11-02
DOI
https://doi.org/10.1109/micro61859.2024.00090
Citations
2
Primary Topic
Distributed and Parallel Computing Systems
Type
article
Field-Weighted Citation Impact
0.70

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article

Sparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse

Hung‐Wei Tseng, Po-An Tsai, Yunan Zhang
2 citations
Distributed and Parallel Computing Systems
0.70
article

Sparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse

Hung‐Wei Tseng, Po-An Tsai, Yunan Zhang
article en
2 citations

Abstract

Sparse Tensor Algebra (STA) applications are limited by data movement and can benefit from better data reuse. Prior research has focused on intra-operator data reuse, such as better dataflow or caching technique for a single STA operation, missing other reuse opportunities at the application level. By expressing STA applications as sparse tensor dataflow graphs, we first identify two unexplored inter-operator data reuse opportunities: 1) producer-consumer reuse and 2) cross-iteration reuse. Producer-consumer reuse combines multiple operations to reduce data movement for intermediate results. Cross-iteration data reuse, a new opportunity identified in this paper, reduces the data movement for the shared sparse data (e.g., graph) across iterations. We then propose Output-stationary-_Element-wise-Input-stationary (OEI) dataflow, a novel dataflow to capture both reuse opportunities in STA applications, and Sparsepipe, a sparse dataflow architecture to support the OEI dataflow and maximize data reuse. Evaluation results show that Sparsepipe with OEI dataflow is 19.82×/4.65× faster than CPU/GPU and 1.77× faster than an ideal sparse accelerator that cannot exploit inter-operator reuse.

University of California, Riverside (US), Nvidia (United States) (US)
University of California, Riverside
Industry, innovation and infrastructure
Openalex Percentile: Top 26%
Distributed and Parallel Computing Systems
0.70
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Sparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse — Hung‐Wei Tseng, Po-An Tsai, et al. · (2024) | TGRS Research Map | TGRS