A Comparison of Frequency-to-Digital Conversion Architectures in VCO-ADCs Built with Standard Cells

Analog-to-Digital converters (ADCs) are a crucial part of many electronic systems, such as communications transceivers or smart sensors for computing-on-the-edge IoT. The design of these converters is strongly constricted by the final application, producing different structures and configurations. ADCs based on VCOs (Voltage-Controlled Oscillators) are being increasingly used due to their simplicity and all-digital structure. VCO-ADCs are conformed by an Analog-to-Frequency converter (i.e., the VCO) and a Frequency-to-Digital converter (FDC) which usually consists of a digital circuit. There is a wide range of possible implementations for FDCs, always focused on improving power consumption, area and noise effects. In this work, an analysis on three different FDCs in 40 nm technology standard cells is presented, aiming towards the comparison of their performance. The first design is based on a FDC previously designed by the authors. The second design is based on a circuit found in the literature. Finally, the third design is based on the second but with some new changes. Comparing these designs can give an idea of the application they are best suited.