Design Co-Processor Based on Partially Homomorphic Encryption Execution Using Open-Source Tool
Exploiting a weakness in OpenSSL's TLS protocol implementation, the Heartbleed vulnerability was found in April 2014 and exposed sensitive data. This study describes a co-processor architecture that reduces the danger of data leaking by applying partly homomorphic encryption. Using secure multiplexers and non-traditional arithmetic units as challenges, our fully functioning device is created in 130nm CMOS technology. Through UART, it exchanges data with the primary CPU. This paper describes an ASIC development process utilizing open-source methodologies, from RTL design to GDS-II.
Authors
- Muhammad Bilal (ORCID: https://orcid.org/0000-0002-5945-0968)
- Haroon Waris (ORCID: https://orcid.org/0000-0003-4670-3919)
- Muhammad Kamran Bhatti
- Muhammad Kahsif Minhas
Publication Details
- Published
- 2024-10-06
- DOI
- https://doi.org/10.1109/vlsi-soc62099.2024.10767785
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00