DynaCache: A Checkpoint Aware Reconfigurable Cache for Intermittently Powered Computing Systems

Energy harvesting devices are rapidly evolving to rival battery-backed technologies. Batteries have a shorter life- time and need maintenance compared to capacitors. Moreover, the usage of batteries comes with undeniable environmental costs. Distinct challenges have emerged such as performance enhancement, crash consistency of data, energy management, etc. To tackle these challenges we propose DynaCache: A checkpoint-aware reconfigurable cache for Intermittent powered computing systems. It is an intermittent computing architecture consisting of a reconfigurable L1 cache that dynamically trans- forms its write policy to strike a favorable trade-off between per- formance, data consistency, and forward progress of a program. Our proposal achieves a speedup in performance of 1.85x and 1.5x compared to non-volatile write-back cache and volatile write- through cache respectively. It also achieves a 99% reduction in dirty data compared to a volatile write-back cache guaranteeing a near absolute data consistency in a scenario of a power failure.

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Publication Details

Published
2024-10-06
DOI
https://doi.org/10.1109/vlsi-soc62099.2024.10767828
Citations
1
Primary Topic
Parallel Computing and Optimization Techniques
Type
article
Field-Weighted Citation Impact
0.49
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DynaCache: A Checkpoint Aware Reconfigurable Cache for Intermittently Powered Computing Systems

Hemangee K. Kapoor, Rishabh Mahanta
1 citations
Parallel Computing and Optimization Techniques
0.49
article

DynaCache: A Checkpoint Aware Reconfigurable Cache for Intermittently Powered Computing Systems

Hemangee K. Kapoor, Rishabh Mahanta
article en
1 citations

Abstract

Energy harvesting devices are rapidly evolving to rival battery-backed technologies. Batteries have a shorter life- time and need maintenance compared to capacitors. Moreover, the usage of batteries comes with undeniable environmental costs. Distinct challenges have emerged such as performance enhancement, crash consistency of data, energy management, etc. To tackle these challenges we propose DynaCache: A checkpoint-aware reconfigurable cache for Intermittent powered computing systems. It is an intermittent computing architecture consisting of a reconfigurable L1 cache that dynamically trans- forms its write policy to strike a favorable trade-off between per- formance, data consistency, and forward progress of a program. Our proposal achieves a speedup in performance of 1.85x and 1.5x compared to non-volatile write-back cache and volatile write- through cache respectively. It also achieves a 99% reduction in dirty data compared to a volatile write-back cache guaranteeing a near absolute data consistency in a scenario of a power failure.

Indian Institute of Technology Guwahati (IN)
Openalex Percentile: Top 34%
Parallel Computing and Optimization Techniques
0.49
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