Soft-Error Analysis of RRAM 1T1R Compute-In-Memory Core for Artificial Neural Networks
This work analyses SEU-induced soft-errors in analog compute-in-memory cores using resistive random-access memory (RRAM) for artificial neural networks, where their bitcells utilize one-transistor-one-RRAM (1T1R) structure. This is modeled by combining the Stanford-PKU RRAM Model and the model of the radiation-induced photocurrent in access transistors. As results, this work derives the maximal RRAM crossbar size without occurring any logic flip and indicates the requirements for RRAM technology to achieve a SEU-resilient 1T1R compute-in memory cores.
Authors
- Ferenc Márkus (ORCID: https://orcid.org/0000-0002-1156-0789)
- Amelie Hagelauer (ORCID: https://orcid.org/0000-0001-9113-9531)
- Stefan Pechmann (ORCID: https://orcid.org/0000-0001-6890-3378)
- Christian Wenger (ORCID: https://orcid.org/0000-0003-3698-2635)
- Lei Zhang (ORCID: https://orcid.org/0000-0002-5540-6441)
- Ruolan Jia
Institutions
- Fraunhofer Research Institution for Microsystems and Solid State Technologies (DE)
- Technical University of Munich (DE)
- Leibniz Institute for High Performance Microelectronics (DE)
Publication Details
- Published
- 2024-11-13
- DOI
- https://doi.org/10.1109/dcis62603.2024.10769203
- Citations
- 1
- Primary Topic
- Neural Networks and Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.35
Funders
- Deutsche Forschungsgemeinschaft