Erasure Demodulation Characteristics with Erasure Overflow threshold

The erasure demodulation is possible to reduce a block error rate (BLER) and extend the communication range of a wireless system. In the erasure demodulation a demodulator regards a decoded bit as an erasure bit if its corresponding likelihood at the output of the decoder is smaller than a threshold. The demodulator outputs both “0“ and “1“ for the erasure bit and CRC error detection following the erasure demodulation checks which output is correct. As one of those outputs must be a correct bit, BLER performance improves. On the other hand, as the number of erasure bits increases, the number of CRC decoding operations grows exponentially. Thus, in this paper, a trade-off between computational complexity and performance improvement is investigated Packets are treated as an erasure overflow state if the number of erasure bits in each packet exceeds a threshold. They are counted as the packets with date recovery errors (DREs). Numerical results obtained through computer simulation show that the proposed scheme improves the DRE probability.