A Fully Integrated 1.8 V Low-Power LDO Regulator with Dynamic Transient Control for SoC Applications

This work presents a novel, fully integrated low-dropout (LDO) regulator optimized for low-power applications with a wide load current range. By utilizing dynamic biasing to improve transient response, the LDO regulator achieves impressive performance with 0.26 μV/mA load regulation (LDR) and 19.92 μV/V line regulation (LNR). It also features a fast 8.6 μs settling time during load transitions up to 30 mA and a low quiescent current of 6.3 μA. The LDO regulator maintains a 1.8 V output for input voltages ranging from 2.1 V to 3.3 V, with a dropout voltage of 100 mV and supports load currents from 0.3 mA to 30 mA over a temperature range of −40 °C to +85 °C. The design, implemented in a standard 180 nm CMOS process, offers high accuracy and efficiency, making it a well-suited solution for battery-powered systems.