A Programmable DLL-based Delay Chain
This paper presents a programmable delay chain (PDC), which utilizes delay-locked loop (DLL) schemes to achieve a constant timing resolution for the process, voltage, and temperature (PVT) variations. This programmable delay chain generates the fixed delay time based on user-controlled code (S<8:0>). The PDC comprises the coarse-tuning and fine-tuning stages. The fine-tuning stage achieves a constant timing resolution via the DLL1. The coarse-tuning stage offers a wide delay range, stabilizing the delay through the DLL2 to reduce the PVT effects. Thus, the delay chain1 and delay chain2 can arrive at an operational range from 500 ps to 100 ns with a timing resolution of 500 ps.
Authors
- Cheng‐En Wu (ORCID: https://orcid.org/0000-0002-3732-0759)
- Jen‐Chieh Liu (ORCID: https://orcid.org/0000-0002-7045-6586)
- Wei-Bin Yang (ORCID: https://orcid.org/0000-0003-4185-0776)
- Yu-Wei Huang
Institutions
- Tamkang University (TW)
- National United University (TW)
Publication Details
- Published
- 2024-08-19
- DOI
- https://doi.org/10.1109/isocc62682.2024.10762463
- Citations
- 1
- Primary Topic
- Embedded Systems Design Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.49