Optimal Efficiency True Random Number Generator with Discrete-time Chaos for Low-Cost Applications

This paper proposes an optimal efficiency True Random Number Generator (TRNG) utilizing switched current structure to implement a discrete-time chaos algorithm. The switched current techniques achieves low cost and low power consumption, thereby achieving optimal efficiency. The proposed design is implemented with a typical 40-nm CMOS process. Post-layout simulations demonstrate that the proposed design can generate random bits at a bit rate of 10 Mb/s with a clock frequency of 10 MHz. The proposed TRNG passed the FIPS 140-2 random number test at all PVT corners. The simulated efficiency is only 14.4 pJ/bit.