Power Reduction Techniques for Energy-Efficient Audio Continuous-Time Delta-Sigma Modulator

This paper presents power reduction techniques for an energy-efficient audio continuous-time delta-sigma modulator (CTDSM) with 24 kHz bandwidth. The proposed CTDSM includes a single opamp resonator with negative-R technique, and a FIR DAC with a 3-level quantizer to mitigate the opamp’s requirements. It is designed using a 65 nm CMOS process and occupies 0.40 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> while consuming only 381.8 μW from a 1.2 V supply. It achieves 102.4 dB peak signal-to-noise and distortion ratio (SNDR) and 109.7 dB spurious free dynamic range (SFDR) with an OSR of 160.