Functionally-Possible Gate-Exhaustive Bridging Faults

As fabrication technologies advance and defects become more difficult to detect, fault models evolve to capture detection conditions of hard-to-detect defects. As a result, the number of faults increases, and fault selection becomes necessary. In this case, it is important if among the selected target faults there are faults that can affect the correct functional operation of the circuit. Such faults are referred to as functionally-possible or FP. FP faults can be identified by a type of tests referred to as functional scan-based tests. Once FP faults are identified, it is possible to detect them using the standard types of scan-based tests to increase the fault coverage and ensure that the tests can be compacted and compressed. This article applies such an approach to bridging faults. Experimental results for benchmark circuits demonstrate the discussion.

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Publication Details

Published
2024-11-03
DOI
https://doi.org/10.1109/itc51657.2024.00014
Citations
1
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.21
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article

Functionally-Possible Gate-Exhaustive Bridging Faults

Irith Pomeranz
1 citations
Integrated Circuits and Semiconductor Failure Analysis
0.21
article

Functionally-Possible Gate-Exhaustive Bridging Faults

Irith Pomeranz
article en
1 citations

Abstract

As fabrication technologies advance and defects become more difficult to detect, fault models evolve to capture detection conditions of hard-to-detect defects. As a result, the number of faults increases, and fault selection becomes necessary. In this case, it is important if among the selected target faults there are faults that can affect the correct functional operation of the circuit. Such faults are referred to as functionally-possible or FP. FP faults can be identified by a type of tests referred to as functional scan-based tests. Once FP faults are identified, it is possible to detect them using the standard types of scan-based tests to increase the fault coverage and ensure that the tests can be compacted and compressed. This article applies such an approach to bridging faults. Experimental results for benchmark circuits demonstrate the discussion.

Purdue University West Lafayette (US)
Openalex Percentile: Top 46%
Integrated Circuits and Semiconductor Failure Analysis
0.21
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