A DLL-Based Three-Step Time-to-Digital Converter for Time-of-Flight Applications

A three-step time-to-digital converter (TDC) based on delay locked loop (DLL) for time-of-flight (ToF) applications is presented in this paper. The employment of the calibration circuit using DLL's features significantly enhances TDC's robustness under varying PVTs (process, voltage and temperature). The proposed clock selection circuit well addresses the metastability issue due to the asynchronous signals between inputs signals and the clock. The TDC is implemented in 180 nm standard CMOS process and supplied with 1.8 V, occupying a core area of 0.2898 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.The post-layout simulation results show it achieves a resolution of 53.3 ps and a measurement range of up to 52.4822 μs. The single shot precision (SSP) of the TDC is 0.85 LSB, whereas the INL is ±1.45 LSB, and the DNL is ±0.8 LSB. The total power consumption is 21 mW at 78.125 MHz.