A Robust DT ∆Σ Modulator for High-Resolution Sensor Against Temperature Variations

This paper presents a 1-bit third-order delta-sigma modulator for high-resolution sensors. By sharing digital-to-analog converter (DAC) and sampling capacitors, we mitigate the influence of KT/C noise, while enhancing resolution through a chopping technique and internal feedback loop. The prototype chip is fabricated in a 28-nm CMOS process with an area of 0.122 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. It achieves a peak signal-to-noise ratio (SNR) of 83.6 dB and a peak signal-to-noise and distortion ratio (SNDR) of 81.6 dB in a 20 kHz signal bandwidth while consuming 13.3 mW from a 1.8 V power supply.