A 38-GHz Stacked-FET Linear Power Amplifier with Novel Phase Linearizer Circuit in 45-nm CMOS SOI

This paper presents a 38-GHz 4-stacked FET linear power amplifier in 45-nm CMOS SOI. A novel phase linearizer is proposed to compensate the nonlinearity of the NMOSFET gate-source capacitance. The power amplifier (PA) employs a 4stacked-FET structure to increase the output power and to overcome the challenge of limited breakdown voltage in downscaled MOSFETs. It is expected that the PA exhibits an output power of 19.9 dBm and a power-added-efficiency (PAE) of 36.6% at the 1-dB gain compression point (P1dB) and a peak PAE of 40.1%. Furthermore, the PA has an AM-PM distortion of less than 0.32 degrees up to P1dB.