Scalable BIST for Linearity Testing of Sigma-Delta Modulators

Sigma Delta converters (SDCs) are widely used in implantable medical devices to process biological signals captured by the on-board sensors. Advancements in semiconductor and packaging technologies have significantly increased the number of features integrated into a single chip, while enabling miniaturization. The added sensor capacity along with reduced test point accessibility creates a burden on production test and increases a need for a viable infield system diagnostic. A Built in Self-Test (BIST) solution that can test linearity of multiple Sigma Delta modulators (SDMs) in parallel can alleviate some of these challenges. However, the implementation of such a solution has a massive hardware overhead caused by statistical binning and processing of dynamic output codes generated by the SDM feedback mechanism. In this paper, we present a scalable BIST scheme that uses a small circular buffer to calculate the LSB (Least significant bit), DNL (Differential nonlinearity) and INL (Integral nonlinearity) of the SDM. The proposed technique is implemented to test three SDMs in parallel and the performance has been compared to the traditional test methodology.