An All-Digital Standard-Cell-Based Resistive-Sensing Display Panel/Chip Crack Detector

This paper presents an all-digital crack detector based on resistance-to-delay conversion. The proposed crack detection scheme provides monotonic resistance sensing with good process portability and realizes a fast, 3-pin low-cost crack test for both the display panel and DDI. Implemented using 28-nm LP CMOS standard cells, the prototype crack detector detects disconnection of the detect line due to cracks and senses a crack resistance of 1– 41 kΩ with an output delay of 69.7–187 ns, demonstrating a worst-case DNL/INL of 0.51/1.64 LSB. The prototype achieves a compact area of 58.8 μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with almost no integration overhead.