UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications

Cryptography, including hash functions and stream ciphers, is crucial for data security across various systems that require flexible, high-performance, and low-power hardware architectures. Unfortunately, existing works are limited in achieving high efficiency and high flexibility. To address this gap, this paper proposes a Unified Cryptographic Processor (UCP) using Unified ALU, shared registers, and compact pipeline scheduling to ensure high flexibility, performance, and low power consumption and hardware resources. Comparisons with FPGA-based studies reveal that the UCP achieves 14.17 and 2.3 times better throughput and power efficiency, respectively. Further, ASIC experimental results demonstrate that the UCP has a unified trade-off from 7.9% to 17.2% reduced throughput compared to the basic single-function cores. Moreover, compared with previous studies that only support a single algorithm, the UCP shows better efficiency in resource utilization, power consumption, and improvements in throughput ranging from 1.49 to 21.2 times.

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Publication Details

Published
2024-08-19
DOI
https://doi.org/10.1109/isocc62682.2024.10762612
Primary Topic
Chaos-based Image/Signal Encryption
Type
article
Field-Weighted Citation Impact
0.00
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article

UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications

Hoai Luan Pham, Yasuhiko Nakashima, Vu Trung Duong Le, Van Duy Tran et al.
Chaos-based Image/Signal Encryption
article

UCP: A Unified Cryptographic Processor for High Performance and Low Power Security Applications

Hoai Luan Pham, Yasuhiko Nakashima, Vu Trung Duong Le, Van Duy Tran, Thi Diem Tran, Tuan Hai Vu
article en

Abstract

Cryptography, including hash functions and stream ciphers, is crucial for data security across various systems that require flexible, high-performance, and low-power hardware architectures. Unfortunately, existing works are limited in achieving high efficiency and high flexibility. To address this gap, this paper proposes a Unified Cryptographic Processor (UCP) using Unified ALU, shared registers, and compact pipeline scheduling to ensure high flexibility, performance, and low power consumption and hardware resources. Comparisons with FPGA-based studies reveal that the UCP achieves 14.17 and 2.3 times better throughput and power efficiency, respectively. Further, ASIC experimental results demonstrate that the UCP has a unified trade-off from 7.9% to 17.2% reduced throughput compared to the basic single-function cores. Moreover, compared with previous studies that only support a single algorithm, the UCP shows better efficiency in resource utilization, power consumption, and improvements in throughput ranging from 1.49 to 21.2 times.

Vietnam National University Ho Chi Minh City (VN), Nara Institute of Science and Technology (JP)
Affordable and clean energy
Openalex Percentile: Top 79%
Chaos-based Image/Signal Encryption
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