Virtual Test Development Using Pre-Silicon Verification Environment
The demand for fast time to market and competitive market entry in the semiconductor industry requires fast project execution. In an integrated circuit (IC) development project, the production test package development is very important and often one of the project’s critical paths to time-to-market. To cope with the project speed requirements and to deliver an effective production test solution, a novel approach is needed.This paper describes the Virtual Test Development (VTD) for an Automated Test Equipment (ATE). It uses the pre-silicon verification environment and the top-level IC design to simulate different production test cases, especially for the complex mixed-signal blocks. One of the objectives of the paper is to describe the process and relevant components for executing VTD. Using VTD, we can reduce the production test development cycle time by capturing early test program issues that otherwise can only be discovered during the real silicon debug using an ATE.
Authors
- Krishnagopal Vinod (ORCID: https://orcid.org/0000-0002-1658-8465)
- Richard Holzner (ORCID: https://orcid.org/0000-0002-8249-7772)
- Emilio Vargas (ORCID: https://orcid.org/0000-0003-4828-6004)
- Romeo C. Ignacio (ORCID: https://orcid.org/0000-0001-7259-8679)
- András István Kun (ORCID: https://orcid.org/0000-0001-6175-551X)
- Kuo-Sheng Ma
- Ernst Aderholz
- O. Pfabigan
- A. Przybilla
- D. Samardzic
- F. Schlagbauer
- M. Schleicher
- J.P. Valiente
- O. Zikulnig
- Q. Atol
- B. Baptist
- V. Kamanuri
- B. Mariacher
Institutions
- Infineon Technologies (Germany) (DE)
Publication Details
- Published
- 2024-11-03
- DOI
- https://doi.org/10.1109/itc51657.2024.00067
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.00