A 2T1C eDRAM-based Compute-In-Memory Macro with 8-to-l Column Multiplexing Scheme for Highly Sparse Binarized Deep Neural Networks

This paper presents a mixed-signal 2T1C embedded DRAM (eDRAM)-based compute-in-memory (CIM) macro that computes binary multiplication and accumulation (MAC) in highly sparse binarized neural networks (BNNs). The readout circuits of the macro are designed with 8-to-1 analog multiplexers and 3.46-bit flash analog-to-digital converters (ADCs) for high throughput and high energy efficiency, considering feasibility of the layout. Furthermore, the proposed CIM macro is designed to analyze the MAC distribution of sparse DNN layers, aiming to minimize energy consumption in regions where the majority of MAC operations are concentrated. Our 2T1C eDRAM-based CIM macro achieves the energy efficiency of 0.54 fJ/OP and throughput of 131 GOPS with a test accuracy of 96.65% ~95.01 % for the MNIST dataset in a 65nm technology.