Fast Performance and Power Profiler for SRAM Compute-in-Memory-based Accelerators

Comprehensive performance analysis of the overall system architecture is essential for realistic application scenarios. However, as target applications become increasingly complex, the design complexity of ASICs also escalates. Efficient early-stage hardware performance evaluation is crucial for cost-effective design. This work introduces a profiler that leverages an analytical model to estimate the performance of SRAM Compute-in-Memory (CiM)-based accelerators. Our experiments show that the profiler's estimates are very close to the cycle-accurate simulator, with differences of less than 3%. Using the profiler, designers can quickly and accurately assess the performance of different hardware specifications, which speeds up the design process.