Optimizing and Addressing Stitch Challenges in High-NA EUV Lithography for Large Die Designs

High-NA (numerical aperture) EUV lithography achieves improved resolution and significantly fewer defects with 0.55NA, enabling sub-10nm patterning. However, for large die designs, High-NA EUV masks cannot be a single continuous patterning due to size limitations of lithographic exposure field and instead consist of multiple smaller yet with stitched patterned regions. This paper proposes PnR (Place and Route) implementation methods designed to prevent patterning issues caused by the stitching of multiple mask patterns. The proposed techniques such as implementing more restrictive region-specific design rules within stitching boundaries, optimizing cell placement and I/O port with stitching-awareness, and repositioning design modules are explored to minimize the impact of the stitch on the overall PPA (performance, power, area) in designs.